In recent years, due to decrease in size and improvement in performance of electronic apparatus, it has been required for a semiconductor apparatus to have a small size and a high density (number of components per unit area). For this reason, a semiconductor apparatus is connected on its rear surface to external terminals by means of a penetrating electrode, which makes the front and rear surfaces of the semiconductor substrate electrically conductive. Further, a plurality of semiconductor substrates, each having a rear surface provided with a wiring line, are laminated, and the front and rear surfaces of the individual semiconductor substrates are electrically connected by the penetrating electrodes, thereby increasing the mounting density. Such penetrating electrodes in semiconductor devices are used in semiconductor chips that are used in semiconductor memories, CMOS sensors, AF sensors and the like. Further, penetrating electrodes are used in various fields, such as in semiconductor packages where a plurality of semiconductor chips are laminated, or an inkjet head body.
Further, it is increasingly needed to form the penetrating electrode in a semiconductor substrate that has semiconductor devices formed thereon, or in a semiconductor substrate having previously formed semiconductor devices and whose structure is partially formed of an organic material. In order to prevent the penetrating electrode from affecting the semiconductor device or the structure formed of the organic material, the penetrating electrode needs to be formed with a low-temperature process. However, it is difficult to form a highly reliable penetrating electrode having a high aspect ratio with respect to a contact hole of a complicated hole shape—such as a reverse tapered shape—with a low-temperature process (for example, 200° C. or less) at low cost, which has been a problem necessary to be solved.
For example, in the configuration that is disclosed in U.S. Patent Application Publication No. 2006/0087042, as illustrated in FIG. 5, a second electrode 106 is thinly formed in a bottom portion of a contact hole 104 and is connected to a first electrode 103. Then, the thickness of the second electrode 106 is increased by plating.
However, as in the conventional example, in the structure where the second electrode 106 is connected to the first electrode 103 at the bottom portion of the contact hole 104, it is difficult to form a reliable penetrating electrode with respect to a contact hole having a high aspect ratio or a contact hole having a reverse tapered shape, with the low-temperature process.
Specifically, first, the second electrode 106 is formed in the contact hole from a second surface of the semiconductor substrate at the rear side, and is connected to the first electrode 103. An MO-CVD method (that is, a CVD method using an organic metal) is used to form a thin film to be the second electrode. In the MO-CVD method, the thin film cannot be formed in the semiconductor substrate without heating the semiconductor substrate to a high temperature. For this reason, a penetrating electrode having high reliability cannot be formed with the low-temperature process (for example, 200° C. or less).
Further, a plating film thickness required for the second electrode is deposited by electroplating in the bottom portion of the contact hole as the surface of the first electrode 103 at the rear side and in a corner portion of the bottom portion of the contact hole. At this time, however, the deposition speed of the plating is significantly different in the bottom portion or the corner portion of the contact hole, and in the second surface of the semiconductor substrate at the rear side. This difference in the deposition speed becomes significant as the aspect ratio increases. For example, with an aspect ratio of 5, the ratio of the deposition film thickness of the second electrode 106 at the bottom portion of the contact hole to the deposition film thickness of the second electrode 106 at the second surface of the semiconductor substrate is 0.5:10 to 1:10, and the circuit thickness of the surface of the semiconductor substrate becomes 10 times larger or more than the thickness of the thin film of the bottom portion of the contact hole due to the deposition difference of plating. For this reason, it becomes difficult to decrease the size of the circuit.
Meanwhile, in the case of electroless plating, problems are generated in adhesion and foam formation during the electroless plating. In particular, from a practical viewpoint, bad adhesion is a large problem. As a method that avoids the problem of adhesion, similar to the case of electroplating, the MO-CVD method is also used in the case of electroless plating, which is the only way to avoid this problem. Similar to the case of electroplating, the problem cannot be solved with low-temperature processing, at 200° C. or less.
Further, there is a method for forming the whole of the second electrode using only the MO-CVD method, without using the plating method. However, the problem cannot be solved with low-temperature processing at 200° C. or less, and practical use is difficult.
Accordingly, it is an object of the present invention to provide a semiconductor apparatus where a penetrating electrode having a high aspect ratio can be formed with a low-temperature process, and a manufacturing method thereof.